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APL3205A/B
Li+ Charger Protection IC
Features
* * * * * * * * * *
Input Over-Voltage Protection Programmable Input Over-Current Protection Battery Over-Voltage Protection Over-Temperature Protection High Immunity of False Triggering High Accuracy Protection Thresholds Fault Status Indication Enable Input Available in TDFN2x2-8 Package Lead Free and Green Devices Available (RoHS Compliant)
General Description
The APL3205A/B provide completed Li+ charger protections against over-voltage, over-current, and battery overvoltage. The IC is designed to monitor input voltage, input current, and battery voltage. When any of the monitored parameters are over the threshold, the IC removes the power from the charging system by turning off an internal switch. All protections also have deglitch time against false triggering due to voltage spikes or current transients. The APL3205A/B also provide over-temperature protection, a FAULT output pin to indicate the fault conditions, and the EN pin to allow the system to disable the IC.
Applications
* * *
Smart Phones and PDAs Digital Still Cameras Portable Devices
Pin Configuration
IN 1 GND 2 PSW 3 FAULT 4 8 OUT 7 ILIM 6 BAT 5 EN TDFN2x2-8 (Top View)
Simplified Application Circuit
5V Adapter or USB IN OUT
Charger Input
APL3205A/B EN FAULT PSW ILIM GND BAT Li+ Battery Charger Output and System
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.2 - May., 2009 1 www.anpec.com.tw
APL3205A/B
Ordering and Marking Information
APL3205A APL3205B Assembly Material Handling Code Temperature Range Package Code
L05A X
Package Code QB : TDFN2x2-8 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device X - Date Code
APL3205A QB:
APL3205B QB:
L05B X
X - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD020C for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).
Absolute Maximum Ratings
Symbol VIN VOUT, VBAT VILIM, VFAULT , VEN , VPSW IOUT TJ TSTG TSDR
(Note 1)
Rating -0.3 to 30 -0.3 to 7 -0.3 to 7 2 150 -65 to 150 260 Unit V V V A
o o o
Parameter IN Input Voltage (IN pin to GND) OUT, BAT Pins to GND Voltage ILIM, FAULT, EN, PSW, Pins to GND Voltage OUT Output Current Maximum Junction Temperature Storage Temperature Range Maximum Lead Soldering Temperature,10 Seconds
C C C
Note 1 : Stresses beyond the absolute maximum rating may damage the device and exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol JA Parameter Junction to Ambient Thermal Resistance in Free Air TDFN2x2-8 Typical Value 80 Unit C/W
Recommended Operating Conditions
Symbol VIN IOUT TJ TA IN Input Voltage OUT Output Current Junction Temperature Ambient Temperature Parameter Range 4.5 to 5.5 0 to 1.5 -40 to 125 -40 to 85 Unit V A C C
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - May., 2009
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APL3205A/B
Electrical Characteristics
Refer to the typical application circuit. These specifications apply over VIN=5V, TA= -40~85C, unless otherwise specified. Typical values are at TA=25C.
Symbol
Parameter
Test Conditions
APL3205A/B Min. Typ. Max.
Unit
POWER-ON-RESET (POR) AND SUPPLY CURRENT VPOR IN POR Threshold IN POR Hysteresis EN = Low ICC TB(IN) IN Supply Current Input Power-On Blanking Time EN = High VIN rising to VOUT rising VIN rising 2.5 230 250 100 8 2.8 350 150 V mV A ms
INTERNAL POWER SWITCH AND OUT DISCHARGE RESISTANCE Power Switch On Resistance OUT Discharge Resistance INPUT OVER-VOLTAGE PROTECTION (OVP) VOVP Input OVP Threshold Input OVP Recovery Hysteresis Input OVP Propagation Delay TON(OVP) Input OVP Recovery Time APL3205A, VIN rising APL3205B, VIN rising 5.67 6.60 5.85 6.80 200 8 6.00 7.00 1 V mV s ms IOUT = 0.5A VOUT = 3V 250 500 450 m
OVER-CURRENT PROTECTION (OCP) IOCP OCP Threshold OCP Threshold Accuracy TB(OCP) TON(OCP) OCP Blanking Time OCP Recovery Time RILIM = 25k IOCP = 300mA to 1500mA 930 -10 1000 176 64 1200 +10 mA % s ms
BATTERY OVER-VOLTAGE PROTECTION VBOVP Battery OVP Threshold Battery OVP Hysteresis IBAT TB(BOVP) BAT Pin Leakage Current Battery OVP Blanking Time VBAT = 4.4V VBAT rising 4.30 4.35 270 176 4.4 20 V mV nA s V V k
EN LOGIC LEVELS EN Input Logic High EN Input Logic Low EN Internal Pull-Low Resistor FAULT LOGIC LEVELS AND DELAY TIME FAULT Output Low Voltage FAULT Pin Leakage Current OVER-TEMPERATURE PROTECTION (OTP) TOTP Over-Temperature Threshold Over-Temperature Hysteresis PSW LOGIC LEVELS PSW Output Low Threshold PSW Output High Threshold VIN rising, VOUT - VBAT VIN falling, VOUT - VBAT 50 20 100 50 150 80 mV mV 140 20 C C Sink 5mA current VFAULT = 5V 0.4 1 V A 1.4 500 0.4 -
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - May., 2009
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APL3205A/B
Electrical Characteristics (Cont.)
Refer to the typical application circuit. These specifications apply over VIN=5V, TA= -40~85C, unless otherwise specified. Typical values are at TA=25C.
Symbol
Parameter
Test Conditions
APL3205A/B Min. Typ. Max.
Unit
PSW LOGIC LEVELS (CONT.) PSW Source Current PSW Sink Current TD(PSW) PSW Low Delay Time VPSW = 2.5V VPSW = 2.5V VIN rising, VOUT - VBAT 2.5 5 1 mA mA ms
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APL3205A/B
Typical Operating Characteristics
Input OVP Threshold vs. Junction Temperature
6.00 APL3205A
Input OVP Threshold vs. Junction Temperature
7.00
Input OVP Threshold , VOVP (V)
Input OVP Threshold , VOVP (V)
5.95 5.90 5.85 5.80 5.75 5.70 5.65 5.60 5.55 -50 -25 0 25 50 75 100 125 VIN Decreasing VIN Increasing
6.95 6.90 6.85 6.80 6.75 6.70 6.65 6.60 6.55 6.50 -50
APL3205B
VIN Increasing
VIN Decreasing
-25
0
25
50
75
100
125
Junction Temperature (oC)
Junction Temperature (oC)
Battery OVP Threshold vs. Junction Temperature
4.40
OCP Threshold vs. Junction Temperature
1200 1150
Battery OVP Threshold, VBOVP (V)
4.35 4.30 4.25 4.20 4.15 4.10 VBAT Decreasing 4.05 4.00 -50 -25 0 25 50 75 100 125
OCP Threshold, IOCP (mA)
VBAT Increasing
1100 1050 1000 950 900 850 800 -50 -25 0 25 50 75 100 125
Junction Temperature (oC)
Junction Temperature (oC)
IN Supply Current vs. Junction Temperature
150
2.80 2.70 2.60 2.50 2.40
POR Threshold vs. Junction Temperature
IN Supply Current, ICC ()
125
100 EN = high
POR Threshold, VPOR (V)
VIN Increasing
75
VIN Decreasing 2.30 2.20
50 -50 -25 0 25 50 75 100 125
-50
-25
0
25
50
75
100
125
Junction Temperature
(oC)
Junction Temperature
(oC)
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APL3205A/B
Typical Operating Characteristics (Cont.)
Power Switch On Resistance vs. Input Voltage
Power Switch On Resistance, RDS,ON (m)
Power Switch On Resistance vs. Junction Temperature
400
Power Switch On Resistance, RDS,ON ()
0.35
0.30
350
0.25
300
0.20
250
0.15
200
0.10 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
150 -50 -25 0 25 50 75
o
100
125
Input Voltage, VIN (V)
Junction Temperature ( C)
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APL3205A/B
Operating Waveforms
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Normal Power On
VIN = 0 to 5V VIN 1 VOUT
1 VIN = 0 to 12V VIN
OVP at Power On
VOUT
2 IOUT
2
VFAULT
3
3
COUT =1F, CIN =1F, ROUT = 10 CH1: VIN, 5V/Div, DC CH2: VOUT, 2V/Div, DC CH3: IOUT, 0.5A/Div, DC TIME: 2ms/Div
COUT =1F, CIN =1F, ROUT = 10 CH1: VIN, 10V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 2ms/Div
Input Over-Voltage Protection
APL3205B V IN
Input Over-Voltage Protection
APL3205A V IN
1 V OUT
1
VOUT
3 2 V FAULT
3 2 V FAULT
COUT = 1F, CIN=1F, ROUT =50 CH1: VIN, 5V/Div, AC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME:20s/Div
COUT = 1F, CIN=1F, ROUT =50 CH1: VIN, 5V/Div, AC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME:20s/Div
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APL3205A/B
Operating Waveforms (Cont.)
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Recovery from Input OVP
APL3204B APL3205B VIN
Battery Over-Voltage Protection
VBAT
1
1 V OUT
VOUT
2
2
VFAULT 3
V FAULT 3
VIN= 12V to 5V COUT = 1F, CIN=1F, ROUT=50 CH1: VIN, 5V/Div, AC CH2: VOUT, 5V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 2ms/Div
VBAT = 3.6V to 4.4V to 3.6V, ROUT=33.3 COUT =1F, CIN =1F CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 5ms/Div
Battery Over-Voltage Protection
Recovery from Battery OVP
VBAT
VB A T
1
V OUT
1 VOUT
2
2
VFAULT 3
3
VFAULT
VBAT = 3.6V to 4.4V, ROUT=33.3 COUT =1F, CIN =1F CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 50s/Div
VBAT = 4.4V to 3.6V, ROUT=33.3 COUT =1F, CIN =1F CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 50s/Div
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APL3205A/B
Operating Waveforms (Cont.)
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Over-Current Protection
Over-Current Protection
IOUT 1
1 2
VIN VOUT
VOUT
2
IOUT 3
VFAULT 3
4 VFAULT
COUT =1F, CIN =1F, IOUT = 0.5A to 1.2A CH1: IOUT, 0.5A/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 50s/Div
COUT=1F, CIN =1 F, ROUT = 2.5 CH1: VIN, 5V/Div, DC CH2: VOUT, 5V/Div, DC CH3: IOUT, 0.5A/Div, DC CH4: VFAULT, 5V/Div, DC TIME: 200ms/Div
PSW Output Timing
VIN = 0V to 5V VBAT = 3.8V VOUT
PSW Output Timing
VIN = 5V to 0V VBAT = 3.8V VOUT
VBAT
VBAT
VPSW
VPSW 1,2,3
1,2,3
COUT =1F, CIN =1F CH1: VBAT, 1V/Div, DC CH2: VOUT, 1V/Div, DC CH3: VPSW, 2V/Div, DC TIME: 200s/Div
COUT =1F, CIN =1F CH1: VBAT, 1V/Div, DC CH2: VOUT, 1V/Div, DC CH3: VPSW, 2V/Div, DC TIME: 5ms/Div
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APL3205A/B
Pin Description
PIN FUNCTION NO. 1 2 3 4 5 6 7 8 NAME IN GND PSW FAULT EN BAT ILIM OUT EP Power Supply Input. Ground. PSW is an active high output that drives the external PMOS (see Application Circuit). Fault Indication Pin. This pin goes low when input OVP, OCP, or battery OVP is detected. Enable Input. Pull this pin to high to disable the device and pull this pin to low to enable device. Battery OVP Sense Pin. Connect to positive terminal of battery through a resistor. Over-current Protection Setting Pin. Connect a resistor to the GND to set the over-current threshold. Output Voltage Pin. The output voltage follows the input voltage when no fault is detected. Exposed Thermal Pad. Must be electrically connected to the GND pin.
Block Diagram
IN
OUT
POR ILIM Charge Pump
0.5V
Gate Driver and Control Logic
1.2V 1V BAT
FAULT PSW
OTP
VOUT VBAT +0.1V
EN
GND
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APL3205A/B
Typical Application Circuit
5V Adapter/ USB 1F 50K
1
IN
OUT
8 1uF
CHRIN GTDRV
APL3205A/B 5 EN PSW FAULT 3 APM2805QA 25K 7 ILIM GND 2 BAT 200K 6 Li+ Battery 0.2
GPIO
50K 50K
MTK PMU
ISENS
MCU
VIO
4
VBAT
Figure 1. The Typical Protection Circuit for Charger Systems.
5V Adapter/ USB 1F 50K
1
8 IN OUT 1uF APL3205A/B GTDRV 3 PSW FAULT APM2103QA CHRIN
5 GPIO 50K 50K 25K 7
EN
MTK PMU
ISENS 0.2 VBAT Li+ Battery
MCU
VIO
4
ILIM GND 2 BAT
200K 6
Figure 2. Use the PSW pin to drive an external P-Channel MOSFET T for Charger Systems.
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APL3205A/B
Function Description
Power-Up The APL3205A/B have a built-in power-on-reset circuit to keep the output shuting off until internal circuitry is operating properly. The POR circuit has hysteresis and a deglitch feature, therefore, it will typically ignore undershoot transients on the input. When input voltage exceeds the POR threshold and after 8ms blanking time, the output voltage starts a soft-start to reduce the inrush current. Over-Temperature Protection Input Over-Voltage Protection (OVP) The input voltage is monitored by the internal OVP circuit. When the input voltage rises above the input OVP threshold, the internal FET will be turned off within 1s to protect connected system on OUT pin. When the input voltage returns below the input OVP threshold minus the hysteresis, the FET is turned on again after 8ms recovery time. The input OVP circuit has a 200mV hysteresis and a recovery time of TON(OVP) to provide noise immunity against transient conditions. Over-Current Protection (OCP) The output current is monitored by the internal OCP circuit. When the output current reaches the OCP threshold, the device limits the output current at OCP threshold level. If the OCP condition continues for a blanking time of TB(OCP), the internal power FET is turned off. After the recovery time of TON(OCP), the FET will be turned on again and the output current is monitored again. The APL3205A/B have a built-in counter. When the total count of OCP fault reaches 16, the FET is turned off permanently, requiring either a VIN POR or EN re-enable again to restart. The OCP threshold is programmed by a resistor RILIM connected from ILIM pin to the GND. The OCP threshold is calculated by the following equation:
IOCP = KILIM RILIM
the internal power FET is turned off. When the BP voltage returns below the battery OVP threshold minus the hysteresis, the FET is turned on again. The APL3205A/B have a built-in counter. When the total count of battery OVP fault reaches 16, the FET is turned off permanently, requiring either a VIN POR or EN re-enable again to restart.
When the junction temperature exceeds 140C, the internal thermal sense circuit turns off the power FET and allows the device to cool down. When the device' juncs tion temperature cools by 20C, the internal thermal sense circuit will enable the device, resulting in a pulsed output during continuous thermal protection. Thermal protection is designed to protect the IC in the event of over temperature conditions. For normal operation, the junction temperature cannot exceed TJ=+125 C. FAULT Output The APL3205A/B provide an open-drain output to indicate that a fault has occurred. When any of input OVP, OCP, battery OVP, is detected, the FAULT goes low to indicate that a fault has occurred. Since the FAULT pin is an open-drain output, connecting a resistor to a pull high voltage is necessary. Enable/Shutdown Pulling the EN pin voltage above 1.4V disables the device and pulling EN pin voltage below 0.4V enables the device. The EN pin has an internal pull-down resistor and can be left floating. When the IC is latched off due to the total count of OCP or battery OVP reaches 16, disable and re-enable the device with the EN pin can clear the counter. PSW Output The APL3205A/B provide an active high output to drive the external P-channel MOSFET. When VOUT > VBAT + 100mV, the PSW pin is pulled low, and turns on the external Pchannel MOSFET for battery charge. When VOUT < VBAT + 50mV, the PSW pin is pulled high, and turns off the external P-channel MOSFET, which prevents the battery voltage from supplying to OUT pin and IN pin (see Application Circuit).
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where KILIM=25000A Battery Over-Voltage-Protection The APL3205A/B monitor the BAT pin voltage for battery over-voltage protection. The battery OVP threshold is internally set to 4.35V. When the BAT pin voltage exceeds the battery OVP threshold for a blanking time of TB(BOVP),
Copyright (c) ANPEC Electronics Corp. Rev. A.2 - May., 2009
APL3205A/B
Function Description (Cont.)
VOVP
VPOR VIN
VOUT
VFAULT
TB(IN)
TON(OVP)
Figure3. OVP Timing Chart
VOUT OCP Threshold Count 13 times
IOUT
VFAULT Total count 16 times IC is latched off
TB(OCP)
TON(OCP)
TB(OCP)
TB(OCP)
Figure 4. OCP Timing Chart
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APL3205A/B
Function Description (Cont.)
VBAT
VBOVP VBOVP
VBOVP
Count 13 times VOUT
VFAULT
TB(BOVP)
TB(BOVP)
TB(BOVP)
Total count 16 times IC is latched off
Figure 5. Battery OVP Timing Chart
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APL3205A/B
Application Information
RBAT Selection Connect the BAT pin to the positive terminal of battery through a resistor RBAT for battery OVP function. The RBAT limits the current flowing from BAT to battery in case of BAT pin is shortened to VIN pin under a failure mode. The recommended value of RBAT is 100k. In the worse case of an IC failure, the current flowing from the BAT pin to the battery is: (30V-3V)/ 100k =270A where the 30V is the maximum IN voltage and the 3V is the minimum battery voltage. The current is so small that can be absorbed by the charger system. The disadvantage with the large RBAT is that the error of the battery OVP threshold will be increased. The additional error is the voltage drop across the RBAT because of the BAT bias current. When RBAT is 100k, the worsecase additional error is 100kx20nA=2mV, which is acceptable in most applications. REN Selection For the same reason as the BAT pin case, the EN pin should be connected to the MCU GPIO pin through a resistor. The value of the REN is dependent on the IO voltage of the MCU. Since the IO voltage is divided by REN and EN internal pull low resistor for EN voltage. It has to be ensured that the EN voltage is above the EN logic high voltage when the GPIO output of the MCU is high. Layout Consideration FAULT Output Since the FAULT pin is an open-drain output, connecting a resistor RUP to a pull high voltage is necessary. It is also recommended that connect the FAULT to the MCU GPIO through a resistor RFAULT. The RFAULT prevents damage to the MCU under a failure mode. The recommended value of the resistors should be between 10k and 100k. In some failure modes, a high voltage may be applied to the device. Make sure that the clearance constraint of the PCB layout must satisfy the design rule for high voltage. The exposed pad of the TDFN2x2-8 performs the function of channeling heat away. It is recommended that connect the exposed pad to a large copper ground plane on the backside of the circuit board through several thermal vias to improve heat dissipation. The input and output capacitors should be placed close to the IC. RILIM also should be placed close to the IC. The high current traces like input trace and output trace must be wide and short.
Figure 6. RUP, RFAULT, REN and RBAT
Li+ Battery EN REN GPIO RBAT FAULT RUP VIO RFAULT GPIO
MCU
BAT
Capacitor Selection The input capacitor is for decoupling and prevents the input voltage from overshooting to dangerous levels. In the AC adapter hot plug-in applications or load current step-down transient, the input voltage has a transient spike due to the parasitic inductance of the input cable. A 25V, X5R, dielectric ceramic capacitor with a value between 1F and 4.7F placed close to the IN pin is recommended. The output capacitor is for output voltage decoupling, and also can be as the input capacitor of the charging circuit. At least, a 1F, 10V, X5R capacitor is recommended.
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APL3205A/B
Package Information
TDFN2x2-8
D A
E
D2 A1
A3
Pin 1 Corner
e S Y M B O L A A1 A3 b D D2 E E2 e L 0.30 0.18 1.90 1.00 1.90 0.60 0.50 BSC 0.45 0.012 TDFN2x2-8 MILLIMETERS MIN. 0.70 0.00 0.20 REF 0.30 2.10 1.60 2.10 1.00 0.007 0.075 0.039 0.075 0.024 0.020 BSC 0.018 MAX. 0.80 0.05 MIN. 0.028 0.000 0.008 REF 0.012 0.083 0.063 0.083 0.039 INCHES MAX. 0.031 0.002
Note : 1. Follow from JEDEC MO-229 WCCD-3.
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L
E2
b
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APL3205A/B
Carrier Tape & Reel Dimensions
OD0
P0
P2
P1
A E1 F
K0 B SECTION A-A
B0
A0
OD1 B
A
SECTION B-B
T
d
Application
A 178.0O .00 2
H 50 MIN. P1 4.0O .10 0
H A
T1
T1 8.4+2.00 -0.00 P2 2.0O .05 0
C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00
d 1.5 MIN. D1 1.5 MIN.
D 20.2 MIN. T 0.6+0.00 -0.4
W 8.0O .20 0 A0 3.35 MIN
E1 1.75O .10 0 B0 3.35 MIN
W
F 3.50O .05 0 K0 1.30O .20 0 (mm)
TDFN2x2-8
P0 4.0O .10 0
Devices Per Unit
Package Type TDFN2x2-8 Unit Tape & Reel Quantity 3000
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APL3205A/B
Taping Direction Information
TDFN2x2-8
USER DIRECTION OF FEED
Classification Profile
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APL3205A/B
Classification Reflow Profiles
Profile Feature Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time (tP)** within 5C of the specified classification temperature (Tc) Average ramp-down rate (Tp to Tsmax) Time 25C to peak temperature Sn-Pb Eutectic Assembly 100 C 150 C 60-120 seconds 3 C/second max. 183 C 60-150 seconds See Classification Temp in table 1 20** seconds 6 C/second max. 6 minutes max. Pb-Free Assembly 150 C 200 C 60-120 seconds 3C/second max. 217 C 60-150 seconds See Classification Temp in table 2 30** seconds 6 C/second max. 8 minutes max.
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process - Classification Temperatures (Tc) Package Thickness <2.5 mm 2.5 mm
3
Volume mm <350 235 C 220 C
3
Volume mm 350 220 C 220 C
3
3
Table 2. Pb-free Process - Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm - 2.5 mm 2.5 mm Volume mm <350 260 C 260 C 250 C Volume mm 350-2000 260 C 250 C 245 C Volume mm >2000 260 C 245 C 245 C
3
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TCT ESD Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD 78 Description 5 Sec, 245C 1000 Hrs, Bias @ 125C 168 Hrs, 100%RH, 2atm, 121C 500 Cycles, -65C~150C VHBMU2KV, VMMU200V 10ms, 1trU 100mA
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APL3205A/B
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838
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